coretile express 板在 versatile™ express 开发系统中提供主系统 cpu。coretile 必须与提供电源、配置和外设连接的主板 express uatx 板配对使用。
处理器子板 express 板与 versatile 产品系列中的前代产品的不同之处在于,其内存和 lcd 控制器等高带宽外设是与 arm 处理器一起在测试芯片中实现的。这会显示提升性能,使系统更适合进行软件基准测试并完全能运行 debian linux 等桌面操作系统。
处理器子板 express 系列支持的 arm 处理器有:
- cortex™-a15 mpcore
- cortex-a9 mpcore
- cortex-a7 mpcore
- cortex-a5 mpcore
请单击下面的“规格”选项卡以查看完整的功能列表。
处理器子板名称 |
coretile express |
coretile express 适用于 cortex-a9 |
coretile express 适用于 cortex-a5 |
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处理器子板名称(简称) | v2p-ca15x2_ca7x3 | v2p-ca9x4 | v2p-ca5x2s |
部件号 | v2p-ca15-0314a | v2p-ca9-0301a | v2p-ca5-0305a |
pcb 号 | hbi-0249 | hbi-0191 | hbi-0225 |
数据表 | 数据表 | 数据表 | 数据表 |
手册 | 用户手册 | 用户手册 | 用户手册 |
产品视频 | n/a | n/a | 视频 |
cpu 类型 |
cortex-a15 mpcore™ |
cortex-a9 mpcore | cortex-a5 mpcore |
cortex-a7 mpcore™ | |||
cpu 数量,速度 |
双核 ca15,1ghz 三核 ca7,800mhz |
四核,400mhz | 双核,100mhz |
cpu 版本 | r2p1,r0p1 | r0p1 | r0p1-rc0 |
协处理器 | neon™ | neon | neon |
l1 高速缓存 i/d | 32kb/32kb | 32kb/32kb | 32kb/32kb |
l2 高速缓存 | 1mb | 512kb | 256kb |
tcm | n/a | n/a | n/a |
sram(片上) | 64kb,64 位 | 16kb,64 位 | 64kb |
sdram | 2gb ddr2,32 位 | 1gb ddr2,32 位 | 1gb ddr2 sodimm |
sdram 速度 | 400mhz | 266mhz | 120mhz |
amba 总线类型 | axi | axi | axi |
内部 amba 总线速度 | 500mhz | 200mhz | 100mhz |
外部 amba 总线速度 | 50mhz (m) | 50mhz (m)、30mhz (s) | 40mhz (m)、40mhz (s) |
嵌入式跟踪 | 16/32 位,ptm,etb (4kb) | 16/32位,ptm,etb (8kb) | itm,etb (8kb) |
调试连接 | jtag 和 swd,20 针 dil | jtag 和 swd,20 针 dil | jtag 和 swd,20 针 dil |
the versatile™ express family development boards provide an
excellent environment for prototyping the next generation
of system-on-chip designs. through a range of plug-in options,
hardware and software applications can be developed and debugged.
the coretile™ express for cortex™-a5 is a structured asic
implementation offering:
• early access to the cortex-a5 mpcore processor.
• benchmarking capability.
• early device driver and software development.
• arm jtag and trace connectors for debug support.
• user logic prototyping with optional fpga boards.
features
• processor subsystem
- dual cortex-a5 with vfp and neon, r0pi-rc0
- l1 cache 32kb instr and 32kb data
- l2 cache 256kb
- 100 mhz operation speed
- coresight support itm, 8kb etb
• axi subsystem
- internal axi 50mhz
- external axi master port 40mhz
- external axi slave port 40mhz
- pl341 ddr2 memory interface
- 1 gb 64-bit sodimm @ 120mhz
- pl354 static memory bus interface
- 32-bit 50mhz to motherboard
- boot from nor flash on motherboard
- hdlcd video controller
• expansion support
- axi master and slave links to expansion fpga daugherboard
• peripheral set compatible with the versatile family
• debug
- arm jtag
- arm 32-bit parellel trace
• simplified configuration via motherboard
- usb flash drive to pc
- fast programming and configuration
- configuration files for system settings
- automated/remote operation
deliverables
• v2p-ca5x2 daughterboard
• 1gb ddr2 sodimm
• versatile express support dvd
• example axi design (additional lte 3mg required)
• selftest software
• debian linux bsp